This invention relates to a method of processing a wafer of a compound semiconductor to leave a pattern on the surface of the wafer. In addition, this invention relates to an apparatus for use in carrying out a method of the type described. It is to be noted throughout the instant specification that the wafer may have at least one deposition layer of a semiconductor.
In general, a wide variety of compound semiconductors have been proposed and applied to various kinds of devices. Among others, a III-V compound semiconductor is very useful for manufacturing a semiconductor laser device, a field effect transistor device, and the like. In order to manufacture such various devices of the III-V compound semiconductor, which may be called III-V compound semiconductor devices, a pattern should be formed or remain on a wafer of such a III-V compound semiconductor. For this purpose, the wafer is processed to deposit a layer on the surface of the wafer and to selectively etch the layer and/or the wafer.
A recent requirement is to establish high performance and an improved function of such a III-V compound semiconductor device. To this end, attention has been directed to accurately or controllably forming a very fine structure which has a pattern smaller in size than 10 nm.
In a conventional method which has been widely used to form a pattern on a wafer of a III-V compound semiconductor, an organic resist is coated on or applied to a wafer surface to form a resist layer. Subsequently, the resist layer is exposed by light or an electron beam and developed by the use of an alkaline liquid into a mask which has a mask pattern. The wafer is etched through the mask by the use of an etchant. Thus, the mask pattern is transferred to the wafer surface and remains as the pattern on the wafer. However, it is difficult with this method to accurately delineate a pattern which has a size smaller than 100 nm.
Alternatively, a focused ion beam (FIB) is recently used to directly etch a wafer of a III-V compound semiconductor to form a pattern on the wafer, without the organic resist. For example, a gas etching method has been proposed in an article contributed by Ochiai et al to Journal of Vacuum Science and Technology, B3, 657 (1985). Specifically, a specimen is etched by the use of both the focused ion beam and chlorine gas. This gas etching may be referred to as a FIB assisted chlorine gas etching.
With this method, it is possible to comparatively readily delineate a pattern which is smaller in size than 100 nm. However, the gas etching is disadvantageous in that a great number of crystal defects take place in the specimen due to irradiation of the focused ion beam. In order to reduce occurrence of such crystal defects, consideration might be made about using a low energy ion beam or about heating a wafer on forming a pattern. Such use of a low energy ion or heating the wafer is helpful to reduce the crystal defects to some extent. However, it is impossible to completely remove such crystal defects by the use of the above-mentioned gas etching.
In the meanwhile, it is to be noted that crystal growth and etching are repeated several times on manufacturing semiconductor devices formed by the use of a compound semiconductor. In addition, a diffusion process often becomes necessary to diffuse an impurity into a wafer on manufacturing such devices. In this event, the wafer is inevitably exposed to air each time when the crystal growth, the etching, and the diffusion are performed. This means that the wafer surface is exposed to air again and again during manufacturing the semiconductor devices. As a result, the wafer surface is undesirably contaminated by adhesion of oxygen, carbon, and the like. Such contamination of a wafer surface gives rise to degradation of characteriscs, such as an increase of a leak current, in semiconductor devices manufactured, as mentioned above.